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Wyniki 1-1 spośród 1 dla zapytania: authorDesc:"PMAŁGORZATA KRAMKOWSKA"

» Fabrication of through-holes in GaAs substrates for device applications

IRENA ZUBEL

PMAŁGORZATA KRAMKOWSKA

IWONA ZBOROWSKA-LINDERT

Device structures on AIIIBV substrates (MESFETs, p-HEMT, integrated circuits MIMICs), intended for the operation at high power and high frequency range, require specific conditions of heat dissipation and minimizing of parasitic capacities and resistances, which affect their electrical performance and response time. Reduction of dimensions, including reduction of substrate thickness, in order to obtain higher integration level is also very important. To fulfill the mentioned requirements, via-type connections, giving the possibility to produce contacts from the backside of the substrate, are created. Such connections facilitate heat dissipation and reduce substrate impedance of high frequency devices. They are widely used in silicon technology, though in the case of AIIIBV compounds, are not so popular. The fact follows probably from much more complex technological process, which is involved in their fabrication. Some examples of implementation of the technology in GaAs sensor applications will be also discussed at the end of this paper. Designing of technological process Theoretical considerations Accomplishment of via-type connections for semiconductor structures made on epitaxial layers of AIIIBV compounds by wet chemical etching imposes many technological problems. They include: thinning of substrates, etching of a hole itself, stopping of etching process at an etch-stop layer. Chemical etching of the holes with micrometric dimensions in the wafer with a typical thickness of few hundred micrometers could result in significant undercut of the etching mask and remarkable extension of the hole size (the lateral underetching is usually comparable with the etching depth). To assure appropriate miniaturization, preliminary thinning of the wafer is necessary. Uchiyama et al [1] employed mechanical grinding and polishing to thin the backside of the wafer up to 30 μm. We have used wet chemical etching for this purpose. App[...] więcej»
w zeszycie ELEKTRONIKA - KONSTRUKCJE, TECHNOLOGIE, ZASTOSOWANIA 2011/3

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