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FLL as Digital Period Synthesizer based on Binary Rate Multiplier Control

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This article describes all digital Frequency Locked Loop (FLL) as period synthesizer, which uses Binary Rate Multiplier (BRM) in feedback for the output period control. Although BRM produces irregularities in its output, the synthesizer compensates them and generates the uniform pulse rate at the output. The functioning and realization of all parts of synthesizer are described. Particular significance was given to the description of the illustration of FLL functioning using realized model and to the application of FLL. The synthesizer for wide period range is presented. Streszczenie.W artykule opisano cyfrowe FLL (ang. Frequency Locked Loop) wykorzystywane w syntezatorach okresu, wykorzystujące w sprzężeniu zwrotnym binarny mnożnik częstotliwości (ang. Binary Rate Multiplier).Syntezator kompensuje wszelkie nieprawidłowości wytwarzane przez BRM na wyjściu i generuje jednolitą częstotliwość impulsowania na wyjściu. Stworzono model opisujący funkcjonowanie FLL. Opisano realizację poszczególnych jego części . (FLL w syntezatorze okresu cyfrowego - sterowanie z wykorzystaniem binarnego mnożnika częstotliwości Keywords: Frequency Locked Loop, Binary Rate Multiplier, Frequency Synthesizer, Słowa kluczowe: FLL, BRM, syntezator częstotliwości. Introduction Generally, different kinds of generators, used in numerous frequency-based circuits and systems, produce the signals whose either frequencies or periods are linearly proportional to the control input. Both of them have some advantages in the corresponding applications. Analog IC circuit Voltage Controlled Oscillator (VCO) found widely applications due to its property to generate the output frequency, which is linearly proportional to the input DC voltage. There are many applications, in both analog and digital frequency systems based on usage of VCO. However, IC circuit BRM is all digital and it generates discrete output frequency which is also linearly proportional to the value of a digit[...]

Recursive PLL of the First Order

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This paper describes a new type of Recursive Phase Locked Loop (PLL) of the first order. The PLL is a linear discrete system described by two recursive equations. The hardware implementation of PLL is described. Different analyses of PLL parameters are made. Computer simulation of PLL is introduced in order to give better insight into the PLL characteristics and to confirm the mathematical analyses, too. Made analysis shows that PLL is suitable for different applications. Precise digital phase shifting of pulse rate is one of the applications which is described. The picture of the input and output pulse rates, recorded on the simulated PLL by professional software package “Multisim", is presented. Streszczenie. Opisano nowy typ rekurencyjnej pętli synchronizacji fazowej (PLL). Przedstawiono różne metody analizy układu oraz symulację komputerową. Opisano możliwość precyzyjnego cyfrowego przesunięcia fazowego impulsów. (Rekursyjna pętla synchronizacji fazowej PLL pierwszego rzędu). Keywords: Phase Locked Loop, Discrete linear system, Recursive algorithm. Słowa kluczowe: układ PLL, rekursyjna pętla fazowa PLL. Introduction Different kinds of PLL are described in theory and practice and different kind of division of PLL can be made. Some earlier systematizations of PLL identified analog, hybrid, discrete and digital kinds of PLL. Although convenient in usage, this division was not precise enough because these groups were made according to different criterions. For instance, analog and hybrid PLL were defined according to the applied technology. Analog PLL are based on analog circuits, but hybrid ones use both analog and digital circuits. Discrete PLL represent discrete systems. They were separated in the independent group due to their principle of work. Namely, they make one correction of the output signal at each discrete time, i.e. once per period of the input signal. All the others PLL belonged to the digital ones, although th[...]

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