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An FPGA-based implementation of ADALINE neural network with low resource utilization and fast convergence

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An FPGA-based fixed-point ADALINE Neural Network core with low resource utilization and fast convergence speed is proposed for embedded adaptive signal processing in real-time. The core is designed in VHDL93 language and is FPGA-brand-independent so can be embedded on any brand to create a system-on-programmable-chip (SoPC). Abstract. Zaproponowano wykorzystanie sieci neuronowej typu FPGA ADALINE do przetwarzania sygnału w czasie rzeczywistym. Rdzeń jest zaprojektowany przy użyciu języka VHDL93. Narzędzie może być wbudowane w dowolny obwód w tym także typu system-on-programmable-chip (SoPC). (Sieć neuronowa typu FPGA ADALINE o szybkiej zbieżności i małym zużyciu zasobów) Keywords: ADALINE Neural Network, Adaptive Signal Processing, FPGA Core, SoPC. Słowa kluczowe: sieć neuronowa, adaptacyjne przetwarzanie sygnałów. Introduction Recently requests for portable and embedded digital signal processing (DSP) systems have been increased dramatically. Applications such as audio devices, hearing aids, cell phones, active noise control systems with constraints such as speed, area and power consumption need an implementation by which these constraints are met with shortest time to market [1]. Some possible solutions are ASIC chips, general purpose processor (GPP) and digital signal processor (DSP). Although the first option can provide a solution to meet hard constraints, it lacks the flexibility that is available in the two others. Using field programmable gate arrays (FPGAs) can reduce the gap between flexibility and high performance. New FPGAs include many primitives that provide DSP applications such as embedded multipliers, multiply and accumulate units (MAC), digital clock management (DCM), DSP-Blocks, and soft/hard processor cores (such as PPC). These facilities are embedded in FPGA fabric and optimized for high performance applications and low power consumption. The availability of soft/hard processor cores in new FPGAs allows imp[...]

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